20 years of DVClub
DVClub Presenters 2015 - Present
DVClub’s claim to fame is the quality of its technical presentations. Presentations are technical content only, and deliberately absent of any marketing material. We are honored to have had contributions from so many technical experts at our events (displayed below). If you’re interested in presenting a topic to our community, please contact info@dvclub.org.
2025
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 03/26/2025 | Location: Boston | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: Sequencer Containers – A Unified and Simple Technique to Execute Both Sequences and Virtual Sequences |
| Date: 05/21/2025 | Location: Austin | Presenter: Ken Albin | Company/Title/Role: System Semantics, Formal Design & Verification Technologist | Topic: Utilizing ISO-8601 to simplify DV scripting |
| Date: 05/21/2025 | Location: Austin | Presenter: Moshe Vardi | Company/Title/Role: Rice University, Distinguished Professor in Computational Engineering | Topic: Program Verification: a 75+-Year History |
| Date: 07/23/2025 | Location: Toronto | Presenter: Gurinder Singh | Company/Title/Role: Arm, Technical Director and DV Lead (Toronto) | Topic: GenAI for Chip Design: From PoCs to Production |
| Date: 07/24/2025 | Location: RTP | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: Sequencer Containers – A Unified and Simple Technique to Execute Both Sequences and Virtual Sequences |
| Date: 07/30/2025 | Location: Silicon Valley | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: Sequencer Containers – A Unified and Simple Technique to Execute Both Sequences and Virtual Sequences |
| Date: 07/31/2025 | Location: Portland | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: Sequencer Containers – A Unified and Simple Technique to Execute Both Sequences and Virtual Sequences |
| Date: 10/15/2025 | Location: Austin | Presenter: Ravi Zende | Company/Title/Role: Principal Engineer in the CPU group at Arm | Topic: SVDesign: Graph + AI Toolkit for Accelerating CPU Design and Debug |
| Date: 12/11/2025 | Location: Austin | Presenter: Dan Joyce | Company/Title/Role: Retired | Topic: First Pass Silicon Success Requires These Ingredients |
2024
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 03/27/2024 | Location: Silicon Valley | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, Vice President of Training and Sunburst Design, Founder | Topic: The Untapped Power of UVM Resources and Why Engineers Should Use the uvm_resource_db API |
| Date: 03/27/2024 | Location: Silicon Valley | Presenter: Bill Moore | Company/Title/Role: Paradigm Works, Senior Verification Engineer | Topic: Gherkin Implementation in SystemVerilog Brings Agile Behavior-Driven Development to UVM |
| Date: 03/28/2024 | Location: Portland | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, Vice President of Training and Sunburst Design, Founder | Topic: The Untapped Power of UVM Resources and Why Engineers Should Use the uvm_resource_db API |
| Date: 03/28/2024 | Location: Portland | Presenter: Bill Moore | Company/Title/Role: Paradigm Works, Senior Verification Engineer | Topic: Gherkin Implementation in SystemVerilog Brings Agile Behavior-Driven Development to UVM |
| Date: 05/1/2024 | Location: Austin/Ft Collins | Presenter: Jean-Christophe Glas | Company/Title/Role: Arm, Technical Director – Productivity Engineering | Topic: GenAI for Chip Design: From PoCs to Production |
| Date: 05/22/2024 | Location: Boston | Presenter: Henry Chang | Company/Title/Role: Designer’s Guide Consulting, Inc, Vice President | Topic: Analog Modeling and Verification in a Digital World |
| Date: 09/4/2024 | Location: Austin/Ft Collins | Presenter: Ken Albin | Company/Title/Role: Concurrent Systems, Consulting DV Engineer | Topic: Utilizing the Python Logging Library in your verification environment |
| Date: 09/4/2024 | Location: Austin/Ft Collins | Presenter: Dan Joyce | Company/Title/Role: Ericsson, Frontend Validation Lead | Topic: Gate Level Simulation – All my secrets to make it faster, easier, cheaper and more likely to find critical bug |
| Date: 12/4/2024 | Location: Austin/Ft Collins | Presenter: Jean-Christophe Glas | Company/Title/Role: Arm, Technical Director – Productivity Engineering | Topic: GenAI for Chip Design: From PoCs to Production |
2023
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 03/8/2023 | Location: Boston | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: The Untapped Power of UVM Resources and Why Engineers Should Use the uvm_resource_db API |
| Date: 04/19/2023 | Location: Austin | Presenter: Yash Phogat | Company/Title/Role: Arm, Sr Engineer – ML | Topic: mL – Shrinking the Verification volume |
| Date: 04/19/2023 | Location: Austin | Presenter: Ken Albin | Company/Title/Role: System Semantics, Chief Engineer | Topic: The Top 5 Myths of Design Verification |
| Date: 09/28/2023 | Location: Austin/Ft Collins | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, Vice President of Training and Sunburst Design, Founder | Topic: The Untapped Power of UVM Resources and Why Engineers Should Use the uvm_resource_db API |
| Date: 12/6/2023 | Location: Austin | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, Vice President of Training and Sunburst Design, Founder | Topic: The Untapped Power of UVM Resources and Why Engineers Should Use the uvm_resource_db API |
2022
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 03/30/2022 | Location: Austin/Ft Collins | Presenter: Rahul Peddi | Company/Title/Role: Arm, Senior Design Engineer | Topic: Accelerating the verification cycle of a Hyperscaler Compute Subsystem |
| Date: 03/30/2022 | Location: Austin/Ft Collins | Presenter: Vaibhav Agrawal | Company/Title/Role: Arm, CPU Formal Verification Team | Topic: Divide and Conquer: An overview of Formal verification strategy for CPUs designed at Arm in Austin |
| Date: 09/23/2022 | Location: Austin/Ft Collins | Presenter: Vivek Vedula | Company/Title/Role: Arm, SDL Methodology Development for HW IPs Team Lead | Topic: Taming the Security Verification Beast: Arm’s Journey Through High-Performance CPUs |
| Date: 09/23/2022 | Location: Austin/Ft Collins | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: Advanced UVM, Multi-Interface, Reactive Stimulus Techniques |
| Date: 10/21/2022 | Location: North America (Virtual) | Presenter: Madhu Iyer | Company/Title/Role: Arm, Memory Subsystem Formal Verification Team | Topic: Formal Verification of the LoadStore Unit for A Class CPU cores at Arm Austin Design Center |
2020
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 02/5/2020 | Location: Silicon Valley | Presenter: Dave Rich | Company/Title/Role: Mentor, a member of the Flows and Methodology Product Engineering team | Topic: SystemVerilog Random Constraints Demystified |
| Date: 02/5/2020 | Location: Silicon Valley | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, President | Topic: UVM Virtual Sequence Techniques |
| Date: 02/21/2020 | Location: Toronto | Presenter: Neil Johnson | Company/Title/Role: Siemens/Mentor, DV Engineer | Topic: Remain Agile Under Pressure with Test-Driven Development |
| Date: 02/21/2020 | Location: Toronto | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: SystemVerilog Assertions – Bindfiles & Best Known Practices for Simple SVA Usage |
| Date: 04/17/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Rich Edelman | Company/Title/Role: Siemens/Mentor, DV Technologist | Topic: COVERGATE: Coverage Exposed |
| Date: 04/17/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Michael Bode | Company/Title/Role: Arm, Design Engineer | Topic: How Design Verification Fits into a Functionally Safe World |
| Date: 05/15/2020 | Location: Silicon Valley (Virtual) | Presenter: Dave Rich | Company/Title/Role: Siemens/Mentor, Member of the Flows and Methodology Product Engineering team | Topic: SystemVerilog Constraints: Appreciating What You Forgot in School to Get Better Results |
| Date: 05/15/2020 | Location: Silicon Valley (Virtual) | Presenter: Michael Bode | Company/Title/Role: Arm, Design Engineer | Topic: How Design Verification Fits into a Functionally Safe World |
| Date: 06/30/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Jeremy Ridgeway | Company/Title/Role: Broadcom, DV Lead | Topic: Wait a sec, I’m not quite done! Delay $finish from every `uvm_fatal report message |
| Date: 06/30/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Mark Glasser | Company/Title/Role: Cerebras Systems, Verification Architect | Topic: Generic Programming in SystemVerilog |
| Date: 06/30/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Alan Pippin | Company/Title/Role: Hewlett Packard Enterprise, MTS | Topic: A Silicon Design Lab’s Emulation Journey |
| Date: 07/15/2020 | Location: Boston and RTP(Virtual) | Presenter: Michael Bode | Company/Title/Role: Arm, Design Engineer | Topic: How Design Verification Fits into a Functionally Safe World |
| Date: 07/15/2020 | Location: Boston and RTP(Virtual) | Presenter: Ray Salemi | Company/Title/Role: Siemens/Mentor, FPGA/MilAero Solutions Manager | Topic: Correct by Design: Catch Your Design Bugs Before Simulation |
| Date: 07/15/2020 | Location: Boston and RTP(Virtual) | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: UVM Reactive Stimulus Techniques |
| Date: 08/21/2020 | Location: Silicon Valley and Portland (Virtual) | Presenter: Mark Glasser | Company/Title/Role: Cerebras Systems, Verification Architect | Topic: 10 Things You Did Not Know are in UVM |
| Date: 08/21/2020 | Location: Silicon Valley and Portland (Virtual) | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: UVM Reactive Stimulus Techniques |
| Date: 09/25/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Harry Foster | Company/Title/Role: Siemens/Mentor, Chief Scientist Verification for the Design Verification Technology Division | Topic: The 2020 Wilson Research Group Functional Verification Study |
| Date: 09/25/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: UVM Reactive Stimulus Techniques |
| Date: 10/21/2020 | Location: North America (Virtual) | Presenter: Alan Pippin | Company/Title/Role: Hewlett Packard Enterprise, MTS | Topic: A Silicon Design Lab’s Emulation Journey |
| Date: 10/21/2020 | Location: North America (Virtual) | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: Two Techniques to Implement UVM Virtual Sequences |
| Date: 11/6/2020 | Location: Silicon Valley and Portland (Virtual) | Presenter: Neil Johnson | Company/Title/Role: Siemens/Mentor, DV Engineer | Topic: I’m Excited About Formal…My Journey From Skeptic To Believer |
| Date: 11/6/2020 | Location: Silicon Valley and Portland (Virtual) | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: UVM Message Display Commands – Capabilities, Proper Usage and Guidelines |
| Date: 12/16/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Neil Johnson | Company/Title/Role: Siemens/Mentor, DV Engineer | Topic: I’m Excited About Formal…My Journey From Skeptic To Believer |
| Date: 12/16/2020 | Location: Austin/Ft Collins (Virtual) | Presenter: Cliff Cummings | Company/Title/Role: Paradigm Works, VP of Training | Topic: UVM Message Display Commands – Capabilities, Proper Usage and Guidelines |
2019
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 10/24/2019 | Location: Boston | Presenter: Tom Fitzpatrick | Company/Title/Role: Siemens/Mentor, Strategic Verification Arhcitect | Topic: Agile Regression Management |
| Date: 10/24/2019 | Location: Boston | Presenter: Seán Adam | Company/Title/Role: AFL. Vice President of Market Strategy and Innovation | Topic: 5G in 5 Minutes |
| Date: 10/24/2019 | Location: Boston | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, President | Topic: Using UVM Virtual Sequencers & Virtual Sequences |
| Date: 01/25/2019 | Location: Silicon Valley | Presenter: Amol Bhinge | Company/Title/Role: NXP, Director | Topic: FPGA-based Emulation: Selecting the Right Platform |
| Date: 03/20/2019 | Location: Austin | Presenter: Harry Foster | Company/Title/Role: Siemens/Mentor, Chief Scientist Verification | Topic: Industry Trends in Functional Verification |
| Date: 04/24/2019 | Location: Silicon Valley | Presenter: Mark Glasser | Company/Title/Role: NVIDIA, Principal Verification Engineer | Topic: Multi-domain Simulation |
| Date: 04/24/2019 | Location: Silicon Valley | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, President | Topic: UVM Analysis Port Functionality and Using Transaction Copy Commands |
| Date: 05/29/2019 | Location: Boston | Presenter: Jeremy Ridgeway | Company/Title/Role: Broadcom, PCI-Express subsystem level verification team | Topic: Want Functional Coverage Closure? Don’t Kneel Before the Almighty Random Constraint Solver |
| Date: 06/13/2019 | Location: Portland | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, President | Topic: UVM Analysis Port Functionality and Using Transaction Copy Commands |
| Date: 06/19/2019 | Location: Austin | Presenter: Elena Tsanko | Company/Title/Role: IBM, Processor Validation Engineer | Topic: Portable Address Translation Stimuli Gneration Using Graph-Based CSP |
| Date: 06/19/2019 | Location: Austin | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, President | Topic: UVM Analysis Port Functionality and Using Transaction Copy Commands |
| Date: 06/27/2019 | Location: Fort Collins | Presenter: Dave Burgoon and Mike Erickson | Company/Title/Role: Microsoft, Senior Design Verification Engineer Microsoft, Principal Engineer | Topic: UVM for IP Designers: Moving Toward “Killing two birds with one stone |
| Date: 06/27/2019 | Location: Fort Collins | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, President | Topic: UVM Analysis Port Functionality and Using Transaction Copy Commands |
| Date: 07/10/2019 | Location: Silicon Valley | Presenter: Kurt Shuler and Diego Botero | Company/Title/Role: Arteris IP, VP and Functional Safety Manager Arteris, Functional Safety Engineer and Corporate Application Engineer | Topic: Maintaining ISO 26262 Activities into the SoC Verification Flow |
| Date: 07/31/2019 | Location: Boston | Presenter: Tom Fitzpatrick | Company/Title/Role: Siemens/Mentor, Strategic Verification Arhcitect | Topic: Portable Stimulus: Evolution to Revolution (a.k.a. Don’t Panic) |
| Date: 08/8/2019 | Location: RTP | Presenter: Tom Fitzpatrick | Company/Title/Role: Siemens/Mentor, Strategic Verification Arhcitect | Topic: Portable Stimulus: Evolution to Revolution (a.k.a. Don’t Panic) |
| Date: 09/27/2019 | Location: Austin | Presenter: James Gorman | Company/Title/Role: Ericsson, System Lead/Architect | Topic: What is 5G |
| Date: 09/27/2019 | Location: Austin | Presenter: Glenn Canto | Company/Title/Role: Ericsson, Virtual Platforms Engineer | Topic: Effective Reuse Through Virtual Platforms at Ericsson |
| Date: 09/27/2019 | Location: Austin | Presenter: Rich Edelman | Company/Title/Role: Siemens/Mentor, Verification Technologist | Topic: UVM – Where Are We? Is it Safe? |
| Date: 11/8/2019 | Location: Silicon Valley | Presenter: James Gorman | Company/Title/Role: Ericsson, System Lead/Architect | Topic: What is 5G |
| Date: 11/8/2019 | Location: Silicon Valley | Presenter: Glenn Canto | Company/Title/Role: Ericsson, Virtual Platforms Engineer | Topic: Effective Reuse Through Virtual Platforms at Ericsson |
| Date: 11/8/2019 | Location: Silicon Valley | Presenter: Rich Edelman | Company/Title/Role: Siemens/Mentor, Verification Technologist | Topic: UVM – Where Are We? Is it Safe? |
| Date: 12/11/2019 | Location: Austin | Presenter: Ken Matthews and Ashutosh Moghe | Company/Title/Role: Samsung, Sr Staff Engineer Qualcomm, Staff Verification Engineer | Topic: Verification of a Modern Branch Predictor |
| Date: 12/11/2019 | Location: Austin | Presenter: Xiushan Feng | Company/Title/Role: Samsung, Formal Verification Group Lead | Topic: Sequential Equivalence Checking Beyond Clock Gating |
2018
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 03/21/2018 | Location: Austin | Presenter: David Borland | Company/Title/Role: Director of Silicon Optimizations at Amazon | Topic: EDA in the Cloud |
| Date: 03/21/2018 | Location: Austin | Presenter: Kaushik Gopalakrishnan | Company/Title/Role: Senior Design Engineer at ARM | Topic: Anvil – Multicore Memory Subsystem Verification Tool for Top-Level DV |
| Date: 04/17/2018 | Location: Silicon Valley | Presenter: Matan Vax | Company/Title/Role: Senior Architect at Cadence Design Systems | Topic: Accellera Portable Stimulus Specification ExplainedPerspec System Verifier and Portable Stimulus Standard in Action (Tutorial) |
| Date: 04/19/2018 | Location: Portland | Presenter: Matan Vax | Company/Title/Role: Senior Architect at Cadence Design Systems | Topic: Accellera Portable Stimulus Specification ExplainedPerspec System Verifier and Portable Stimulus Standard in Action (Tutorial) |
| Date: 04/27/2018 | Location: Fort Collins | Presenter: Amol Bhinge | Company/Title/Role: Design Verification and Emulation Director at NXP | Topic: SoC Design Verification: Challenges, Innovations and Beyond |
| Date: 04/27/2018 | Location: Fort Collins | Presenter: Alan Pippin | Company/Title/Role: Expert Technical Lead at Hewlett Packard Enterprise | Topic: Big Data in Verification: Making Your Engineers Smarter |
| Date: 04/27/2018 | Location: Fort Collins | Presenter: Dave Burgoon | Company/Title/Role: Senior Design Verification Engineer at Microsoft | Topic: UVM for HLS: An Expedient Approach to the Functional Verification of HLS Designs |
| Date: 05/9/2018 | Location: Boston | Presenter: Josh Rensch | Company/Title/Role: SoC Verification Lead at GlobalFoundries | Topic: Team Building is as Easy as Stealing a Car |
| Date: 05/9/2018 | Location: Boston | Presenter: Erik de Briae | Company/Title/Role: Verification Manager at Netronome | Topic: ROSE DV Tool Suite |
| Date: 06/19/2018 | Location: Austin | Presenter: Swami Venkatesan | Company/Title/Role: Senior Architect at Cadence | Topic: Accellera Portable Stimulus Specification Explained |
| Date: 06/19/2018 | Location: Austin | Presenter: Dave Burgoon | Company/Title/Role: Senior Design Verification Engineer at Microsoft | Topic: UVM for HLS: An Expedient Approach to the Functional Verification of HLS Designs |
| Date: 07/11/2018 | Location: Silicon Valley | Presenter: Dave Burgoon | Company/Title/Role: Senior Design Verification Engineer at Microsoft | Topic: UVM for HLS: An Expedient Approach to the Functional Verification of HLS Designs |
| Date: 07/11/2018 | Location: Silicon Valley | Presenter: Josh Rensch | Company/Title/Role: SoC Verification Lead at GlobalFoundries | Topic: Team Building is as Easy as Stealing a Car |
| Date: 08/1/2018 | Location: Boston | Presenter: Dave Burgoon | Company/Title/Role: Senior Design Verification Engineer at Microsoft | Topic: UVM for HLS: An Expedient Approach to the Functional Verification of HLS Designs |
| Date: 08/1/2018 | Location: Boston | Presenter: Narayana Reddy | Company/Title/Role: Senior Application Engineer at Cadence | Topic: Cross-Domain Merging of Simulation and Emulation Coverage Databases (Tutorial) |
| Date: 08/2/2018 | Location: RTP | Presenter: Erik de Briae | Company/Title/Role: Verification Manager at Netronome | Topic: ROSE DV Tool Suite |
| Date: 08/2/2018 | Location: RTP | Presenter: Josh Rensch | Company/Title/Role: SoC Verification Lead at GlobalFoundries | Topic: Team Building is as Easy as Stealing a Car |
| Date: 09/11/2018 | Location: Austin | Presenter: Mark Glasser | Company/Title/Role: NVIDIA, Principal Verification Architect | Topic: Generic Programming in SystemVerilog |
| Date: 09/11/2018 | Location: Austin | Presenter: Aman Arora | Company/Title/Role: NVIDIA, Verification Engineer | Topic: Using Hardware Verification Methodologies to Verify the BootROM of a Complex SoC |
| Date: 10/10/2018 | Location: Silicon Valley | Presenter: Mark Glasser | Company/Title/Role: NVIDIA, Principal Verification Architect | Topic: Generic Programming in SystemVerilog |
| Date: 11/7/2018 | Location: Boston | Presenter: Cliff Cummings | Company/Title/Role: President of Sunburst Design, Inc. | Topic: UVM Analysis Port Functionality and Using Transaction Copy Commands” |
| Date: 12/7/2018 | Location: Austin | Presenter: Nick Jones | Company/Title/Role: Samsung, Verification Engineer | Topic: Leveraging LevelDB for Unit-level Replay of Top-level Stimulus in UVM |
| Date: 12/7/2018 | Location: Austin | Presenter: Sean Sun | Company/Title/Role: Global HW Performance Verification Manager | Topic: A New Frontier of Verification |
2017
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 01/11/2017 | Location: Silicon Valley | Presenter: Cliff Cummings | Company/Title/Role: President of Sunburst Design, Inc. | Topic: SystemVerilog Assertions – Bindfiles & Best Known Practices for Simple SVA Usage |
| Date: 01/11/2017 | Location: Silicon Valley | Presenter: Andy Stein | Company/Title/Role: VP of Sales at Avery Design Systems | Topic: Gate Simulation signoff throughout by handling the noise from False X’s (Tutorial) |
| Date: 02/23/2017 | Location: Fort Collins | Presenter: Cliff Cummings | Company/Title/Role: President of Sunburst Design, Inc. | Topic: SystemVerilog Assertions – Bindfiles & Best Known Practices for Simple SVA Usage |
| Date: 02/23/2017 | Location: Fort Collins | Presenter: Jeremy Ridgeway | Company/Title/Role: Principal Verification Engineer at Broadcom | Topic: The Objectification of SystemVerilog Constraints |
| Date: 02/23/2017 | Location: Fort Collins | Presenter: Matt Diehl | Company/Title/Role: Applications Engineer with Cadence Design Systems | Topic: Next Generation Verification Planning and Management Solution Overview (vManagerTM) (Tutorial) |
| Date: 03/8/2017 | Location: Austin | Presenter: Nihar Shah | Company/Title/Role: ARM | Topic: Detoxify Your Schedul With A Low-Fat UVM Environment |
| Date: 03/8/2017 | Location: Austin | Presenter: Prasad Saravu | Company/Title/Role: Verification Lead, Samsung | Topic: Multi-Processor Memory Scoreboard: A multi-processor memory ordering and data consistency checker |
| Date: 03/8/2017 | Location: Austin | Presenter: Adnan Hamid | Company/Title/Role: CEO, Breker Verification Systems | Topic: Portable Stimulus with Breker’s TrekSoC too (Tutorial) |
| Date: 04/5/2017 | Location: Raleigh | Presenter: Amol Bhinge | Company/Title/Role: Senior SoC Verification Manager at NXP Semiconductors | Topic: SoC Design Verification: Challenges, Innovations and Beyond |
| Date: 05/17/2017 | Location: Boston | Presenter: Cliff Cummings | Company/Title/Role: President of Sunburst Design, Inc. | Topic: SystemVerilog Assertions – Bindfiles & Best Known Practices for Simple SVA Usage |
| Date: 05/17/2017 | Location: Boston | Presenter: Adnan Hamid | Company/Title/Role: CEO, Breker Verification Systems | Topic: Portable Stimulus with Breker’s TrekSoC tool (Tutorial) |
| Date: 05/24/2017 | Location: Silicon Valley | Presenter: Eldon Nelson | Company/Title/Role: Verification Engineer at Intel | Topic: Improving Constrained Random Testing by Achieving Simulation Verification Goals through Objective Functions, Rewinding and Dynamic Seed Manipulation |
| Date: 05/24/2017 | Location: Boston | Presenter: Adnan Hamid | Company/Title/Role: CEO, Breker Verification Systems | Topic: Portable Stimulus with Breker’s TrekSoC tool (Tutorial) |
| Date: 06/8/2017 | Location: Portland | Presenter: Cliff Cummings | Company/Title/Role: President of Sunburst Design, Inc. | Topic: SystemVerilog Assertions – Bindfiles & Best Known Practices for Simple SVA Usage |
| Date: 06/28/2017 | Location: Austin | Presenter: Greg Smith | Company/Title/Role: Verification Engineer at Oracle Corporation | Topic: Functional Coverage is Useless!” by Greg Smith |
| Date: 06/28/2017 | Location: Austin | Presenter: Stan Sokorac | Company/Title/Role: Sr. Principal Design Engineer at ARM | Topic: Optimizing Random Test Constraints Using Machine Learning Algorithms |
| Date: 09/13/2017 | Location: Austin | Presenter: Vikram Khosa | Company/Title/Role: Verification Lead at ARM | Topic: Deep-Formal Deployment on an A-class ARM CPU Family : An Overview and Lessons Learned |
| Date: 09/13/2017 | Location: Austin | Presenter: Vaibhav Agrawal | Company/Title/Role: Validation Engineer at ARM | Topic: Two Case Studies in Formal Deployment on ARM CPUs: Instruction-Fetch and Floating Path Datapath |
| Date: 10/11/2017 | Location: Silicon Valley | Presenter: Greg Smith | Company/Title/Role: Verification Engineer at Oracle Corporation | Topic: Functional Coverage is Useless” by Gr |
| Date: 10/11/2017 | Location: Silicon Valley | Presenter: Andy Stein | Company/Title/Role: VP of Sales at Avery Design Systems | Topic: Improving ‘Gate Simulation Signoff’ throughput by handling the noise from False X’s” by Andy Stein, Avery Design Systems (Tutorial) |
| Date: 11/8/2017 | Location: Boston | Presenter: Greg Smith | Company/Title/Role: Verification Engineer at Oracle Corporation | Topic: Functional Coverage is Useless |
| Date: 12/6/2017 | Location: Austin | Presenter: John Dickol | Company/Title/Role: Principal Engineer at the Samsung | Topic: I Didn’t Know Constraints Could Do That! |
| Date: 12/6/2017 | Location: Austin | Presenter: Heath Chambers | Company/Title/Role: President of HMC Design Verification, Inc | Topic: SystemVerilog and UVM Virtual Interfaces for Class-Based Testing (Tutorial) |
2016
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 01/13/2016 | Location: Silicon Valley | Presenter: Ram Narayan and Tom Symons | Company/Title/Role: Senior Verification Engineers, Oracle Labs’ Hardware Adv. Development Group | Topic: I Created the Verification Gap |
| Date: 01/20/2016 | Location: Toronto | Presenter: Bruno Bratti | Company/Title/Role: Wave Semiconductor, Application Engineer | Topic: AXI HW/SW Verification for FPGA |
| Date: 01/27/2016 | Location: Portland | Presenter: Bruno Bratti | Company/Title/Role: Wave Semiconductor, Application Engineer | Topic: AXI HW/SW Verification for FPGA |
| Date: 02/17/2016 | Location: Boston | Presenter: Bruno Bratti | Company/Title/Role: Wave Semiconductor, Application Engineer | Topic: AXI HW/SW Verification for FPGA |
| Date: 03/9/2016 | Location: Austin | Presenter: Xiankun “Robert” Jin | Company/Title/Role: NXP, Senior Verification Engineer | Topic: A Built-in-Self-Test Solution of Analog-to-Digital Converter Benefiting from High Level Synthesis |
| Date: 03/9/2016 | Location: Austin | Presenter: Bruno Bratti | Company/Title/Role: Wave Semiconductor, Application Engineer | Topic: AXI HW/SW Verification for FPGA |
| Date: 04/7/2016 | Location: RTP | Presenter: William Joyner | Company/Title/Role: SRC, Senior Science Director | Topic: SRC: Battling Bugs Since 1982 |
| Date: 04/7/2016 | Location: RTP | Presenter: Herbert Rivera-Sanchez | Company/Title/Role: Cadence, Solutions Architect | Topic: SoC Performance Analysis through the use of VIPs (Tutorial) |
| Date: 04/27/2016 | Location: Silicon Valley | Presenter: Cliff Cummings | Company/Title/Role: Sunburst Design, CEO | Topic: Using UVM Virtual Sequencers & Virtual Sequences |
| Date: 04/27/2016 | Location: Silicon Valley | Presenter: Roxan Saint-Hilaire | Company/Title/Role: Cadence, AE Director | Topic: New Debug Methodology for UVM – a tutorial (Tutorial) |
| Date: 05/18/2016 | Location: Boston | Presenter: Eldon Nelson | Company/Title/Role: Intel, Verification Lead | Topic: Design Patterns by Example for SystemVerilog Verification Environments Enabled by SystemVerilog 1800-2012 |
| Date: 06/1/2016 | Location: Austin | Presenter: Zhipeng Ye | Company/Title/Role: TI, Senior Verification Engineer | Topic: Functional Coverage Collection for Analog Circuits |
| Date: 06/1/2016 | Location: Austin | Presenter: Stan Sokarac | Company/Title/Role: ARM, Senior Principal Design Engineer | Topic: SystemVerilog Interface Classes: More Useful Than You Thought |
| Date: 06/15/2016 | Location: Portland | Presenter: Amol Bhinge | Company/Title/Role: NXP, Senior Verification Manager | Topic: SoC Design Verification: Challenges, Innovations and Beyond |
| Date: 07/27/2016 | Location: Silicon Valley | Presenter: Amol Bhinge | Company/Title/Role: NXP, Senior Verification Manager | Topic: SoC Design Verification: Challenges, Innovations and Beyond |
| Date: 08/24/2016 | Location: Boston | Presenter: John Dickol | Company/Title/Role: Principal Engineer at Samsung’s Austin R&D Center (SARC) | Topic: Advanced Usage Models for Continuous Integration in Verification Environments |
| Date: 09/7/2016 | Location: Austin | Presenter: Ken Albin | Company/Title/Role: Oracle, Senior Design Verification Engineer | Topic: The Cost of SoC Bugs |
| Date: 10/12/2016 | Location: Silicon Valley | Presenter: Dave Brownell | Company/Title/Role: Analog Devices, Design Verification Methodology Manager | Topic: Portable Stimulus: The Next Step in Verification Productivity |
| Date: 10/12/2016 | Location: Silicon Valley | Presenter: Sven Beyer and Sasa Stamenkovic | Company/Title/Role: Technical Manager at OneSpin Application Engineer at OneSpin | Topic: Making Formal Friendly for Simulation Savvy Engineers (Tutorial) |
| Date: 11/9/2016 | Location: Boston | Presenter: Dave Brownell | Company/Title/Role: Design Verification Methodology Manager at Analog Devices | Topic: Portable Stimulus: The Next Step in Verification Productivity |
| Date: 11/9/2016 | Location: Boston | Presenter: Franco De Seta | Company/Title/Role: Applications Engineer, Cadence | Topic: Measuring SoC Performance: How to create SoC performance use cases with Cadence’s Interconnect Workbench (IWB) (Tutorial) |
| Date: 12/7/2016 | Location: Austin | Presenter: Thinh Ngo | Company/Title/Role: Principal Design Verification Engineer at Broadcom | Topic: Accelerate Your Testbench Development Time With a Hybrid Testbench |
| Date: 12/7/2016 | Location: Austin | Presenter: Eldon Nelson | Company/Title/Role: Verification Engineer at Intel | Topic: “Design Patterns by Example for SystemVerilog Verification Environments Enabled by SystemVerilog 1800-2012 |
| Date: 12/7/2016 | Location: Austin | Presenter: Sasa Stamenkovic | Company/Title/Role: Application Engineer at OneSpin Solutions | Topic: Making Formal Friendly for Simulation Savvy Engineers (Tutorial) |
| Date: 12/7/2016 | Location: Austin | Presenter: Rayfes Mondal | Company/Title/Role: ARM | Topic: Virtual Prototyping with ARM SoC Designer for IP Selection and Architectural Exploration (Tutorial) |
| Date: 12/7/2016 | Location: Austin | Presenter: Venkataramana “Reddi” Reddipalli | Company/Title/Role: Applications Engineer at Cadence | Topic: High-Speed Software-Driven SoC Verification with Parallel Simulation (Tutorial) |
2015
| Date | Location | Presenter | Company/Title/Role | Topic |
|---|---|---|---|---|
| Date: 05/13/2015 | Location: Boston | Presenter: Mark Glasser | Company/Title/Role: NVidia, Verification Manager | Topic: Configuration in UVM: The Missing Manual |
| Date: 06/3/2015 | Location: Austin | Presenter: John Dickol | Company/Title/Role: Samsung, Principal Engineer | Topic: Advanced Usage Models for Continuous Integration in Verification Environments |
| Date: 06/25/2015 | Location: Portland | Presenter: Ed Nolan | Company/Title/Role: Teradyne, Principal Engineer | Topic: PCIe Based Communication Verification Infrastructure |
| Date: 07/15/2015 | Location: Silicon Valley | Presenter: John Dickol | Company/Title/Role: Samsung Austin R&D Center (SARC). | Topic: Advanced Usage Models for Continuous Integration in Verification Environments |
| Date: 08/12/2015 | Location: Boston | Presenter: John Sweeney | Company/Title/Role: Cavium, Senior Consulting Engineer | Topic: Distributed Bottoms Up Project Planning and Tracking |
| Date: 08/12/2015 | Location: Boston | Presenter: Monica Farkash | Company/Title/Role: NXP Austin, R&D, Design Enablement | Topic: HW Development with Data Mining: Understanding Coverage |
| Date: 09/9/2015 | Location: Austin | Presenter: Eric Hennenhoefer | Company/Title/Role: DVClub Founder | Topic: 10-year Anniversary Celebration – Panel of Guest Speakers |
| Date: 10/7/2015 | Location: RTP | Presenter: Oleg Petlin | Company/Title/Role: AMD, Senior Manager | Topic: Formal property verification at AMD: Theory and Practice |
| Date: 10/14/2015 | Location: Silicon Valley | Presenter: Bruno Bratti | Company/Title/Role: Wave Semiconductor, Application Engineer | Topic: AXI HW/SW Verification for FPGA |
| Date: 11/11/2015 | Location: Boston | Presenter: Suckheui Chung | Company/Title/Role: AMD,Verification Engineer | Topic: 100% Functional Coverage with Formal Methodology |
| Date: 12/2/2015 | Location: Austin | Presenter: Ram Narayan and Tom Symons | Company/Title/Role: Senior Verification Engineers, Oracle Labs’ Hardware Adv. Development Group | Topic: I Created the Verification Gap |
| Date: 12/2/2015 | Location: Austin | Presenter: Magdy El-Moursy and Ashraf Salem | Company/Title/Role: Mentor Graphics in Egypt | Topic: The Virtual Platform technology for Electronic System Level Design and Verification (Tutorial) |